學員學習本課程應具備下列基礎知識：
        ◆ 電路系統的基本概念。

        1、培訓過程中，如有部分內容理解不透或消化不好，可免費在以后培訓班中重聽；
        2、培訓結束后,授課老師留給學員聯系方式,保障培訓效果,免費提供課后技術支持。
        3、培訓合格學員可享受免費推薦就業機會。

1, What’s Hot and New about IC?
2, Solve your Custom Design Challenges with Cadence Virtuoso? platform
3, OpenAccess database
4, Introduction to IC61
4, Simulation & Verification
5, Silicon Analysis
6, Digital IC Part I: Front-End (Logic) Design with Cadence Logic Design Team solution
7, Chip Planning Solutions with CPS
8, Conformal Products Update
9, Design for Test with RC/Test Update
10, Design for Low Power with RC/CPF
11, Digital IC Part II: Physical Implementation with Cadence Encounter? platform
? LP implementation with CPF
? Digital Mixed Signal Design using EDI
? Advanced Technology for 32nm and below
? Digital GHz Designs with over 100 MGates
12, Packaging Design with Cadence Allegro? PCB and Packaging Design Solution
? System in Package (SiP) Introduction and Development Trend
? IC Packaging Basics
? IC Packaging Technology Evolution
? System in Packaging (SiP) Development
? What’s SiP
? SiP Future & Benefits
? SiP Development Trends
? What’s Co-design
? SiP Design Flow & Challenges
13, Enterprise Plan-to-Closure Methodology based on Cadence Incisive? Platform
? Enterprise Manager
? VIP Portfolio
? Verification Acceleration and Emulation